Our FPGA-accelerated bird detector is now working at Airport Oberpfaffenhofen.

Our FPGA-accelerated bird detector at Airport Oberpfaffenhofen
Our FPGA-accelerated bird detector at Airport Oberpfaffenhofen(c) 2024 TUM
The container for the FPGA and cable connection
The container for the FPGA and cable connection(c) 2024 TUM
The container for the FPGA and cable connection
The container for the FPGA and cable connection(c) 2024 TUM

Our bachelor student, Gabor Fogarasi, deployed an FPGA-accelerated bird detector at Airport Oberpfaffenhofen for bird strike prevention based on his engineering project in WiSe 23/24, as part of Brandenburg / Bayern Action for AI Hardware (BB-KI Chips).

The underlying detection model was pre-trained by quantization-aware training to reduce the model size and increase inference speed using low-precision model parameters. Experiments show 50 times faster detection speed without significantly compromising accuracy than the uncompressed model. The massive parallelism of FPGA further ensures the efficiency of online inference.

Birds are monitored by an IP camera connected to the FPGA board running the detection model in the backend at approx. 2 FPS for 4K inputs. A 3D-printed detector container is also designed for essential waterproofing and heat sinking. The gif shows some birds detected at the scene.


© 2020 M. Werner